ASIC/SOC Design Engineer - XD-RDC-010

The Role

  • Create a micro-architecture specification and test plan.
  • Implement RTL based on the specification.
  • Synthesize RTL and close timing with proper IO constraints.
  • Validate RTL in simulation, gate simulation/power simulation, UPF flow, and chip bring-up.
  • Complete other temporary work arranged by the superior.

Required Qualifications

  • At least 5 years experiences in ASIC design and verification
  • Strong Verilog / VHDL programming skills, including unit level verification
  • Experience in working with software engineers to verify software and hardware integration.

Desired Qualifications

  • Experience integrating and validating high-speed interfaces (USB, DDR) and networking protocols (Ethernet) on ASIC.
  • Experience in designing and verifying peripheral devices SPI, QSPI, UART, I2C, SDIO, DMA, AXI bus arbiter / monitor on ASIC.
  • Experience in verifying and debugging multiprocessor ASIC System.
  • Have professional knowledge of synthesis constraints (IO and internal chip) and the ability to set synthesis constraints from scratch;.
  • Experience in designing compiler, formal verification, prime time, CDC and lint.


  • Bachelor or master